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Dual/Quad Low Power, High Speed JFET Operational Amplifiers OP282/OP482
FEATURES
High slew rate: 9 V/s Wide bandwidth: 4 MHz Low supply current: 250 A/amplifier max Low offset voltage: 3 mV max Low bias current: 100 pA max Fast settling time Common-mode range includes V+ Unity-gain stable
PIN CONNECTIONS
OUT A -IN A +IN A V- 1 2 3 4 8 7 V+ OUT B -IN B +IN B
00301-001
OP282
6 OP-482 5
Figure 1. 8-Lead Narrow-Body SOIC (S-Suffix) [R-8]
APPLICATIONS
Active filters Fast amplifiers Integrators Supply current monitoring
OUT A 1 -IN A 2 +IN A 3 V- 4
8
V+ OUT B
00301-002
00301-004
00301-003
OP282
TOP VIEW (Not to Scale)
7 6 5
-IN B +IN B
Figure 2. 8-Lead MSOP [RM-8]
GENERAL DESCRIPTION
The OP282/OP482 dual and quad operational amplifiers feature excellent speed at exceptionally low supply currents. The slew rate is typically 9 V/s with a supply current under 250 A per amplifier. These unity-gain stable amplifiers have a typical gain bandwidth of 4 MHz. The JFET input stage of the OP282/OP482 ensures bias current is typically a few picoamps and below 500 pA over the full temperature range. Offset voltage is under 3 mV for the dual and under 4 mV for the quad. With a wide output swing, within 1.5 V of each supply, low power consumption, and high slew rate, the OP282/OP482 are ideal for battery-powered systems or power restricted applications. An input common-mode range that includes the positive supply makes the OP282/OP482 an excellent choice for high-side signal conditioning. The OP282/OP482 are specified over the extended industrial temperature range. The OP282 is available in the standard 8-lead narrow SOIC and MSOP packages. The OP482 is available in PDIP and narrow SOIC packages.
OUT A -IN A +IN A V+ +IN B -IN B OUT B
1 2 3 4 5 6 7 -+ +- -+ +-
14 OUT D 13 -IN D 12 +IN D
OP482
11 V- 10 +IN C 9 8 -IN C OUT C
Figure 3. 14-Lead PDIP (P-Suffix) [N-14]
OUT A -IN A +IN A V+ +IN B -IN B OUT B
1 2 3
14 13 12
OUT D -IN D +IN D V- +IN C -IN C OUT C
OP482
4 5 6 7
11 10 9 8
Figure 4. 14-Lead Narrow-Body SOIC (S-Suffix) [R-14]
Rev. F
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.326.8703 (c) 2004 Analog Devices, Inc. All rights reserved.
OP282/OP482 TABLE OF CONTENTS
Specifications..................................................................................... 3 Electrical Characteristics ............................................................. 3 Absolute Maximum Ratings............................................................ 4 ESD Caution.................................................................................. 4 Typical Performance Characteristics ............................................. 5 Applications Information .............................................................. 12 High-Side Signal Conditioning ................................................ 12 Phase Inversion........................................................................... 12 Active Filters ............................................................................... 12 Programmable State-Variable Filter......................................... 13 Outline Dimensions ....................................................................... 14 Ordering Guide .......................................................................... 16
REVISION HISTORY
10/04--Data Sheet Changed from Rev. E to Rev. F Deleted 8-Lead PDIP .........................................................Universal Added 8-Lead MSOP .........................................................Universal Changes to Format and Layout.........................................Universal Changes to Features.......................................................................... 1 Changes to Pin Configurations....................................................... 1 Changes to General Description .................................................... 1 Changes to Specifications ................................................................ 3 Changes to Absolute Maximum Ratings ....................................... 4 Changes to Table 3............................................................................ 4 Added Figure 5 through Figure 20; Renumbered Successive Figures............................................................................. 5 Updated Figure 21 and Figure 22 ................................................... 7 Updated Figure 23 and Figure 27 ................................................... 8 Updated Figure 29 ............................................................................ 9 Updated Figure 35 and Figure 36 ................................................. 10 Updated Figure 43 .......................................................................... 11 Changes to Applications Information.......................................... 12 Changes to Figure 44...................................................................... 12 Deleted OP282/OP482 Spice Macro Model Section.................... 9 Deleted Figure 4................................................................................ 9 Deleted OP282 Spice Marco Model ............................................. 10 Updated Outline Dimensions ....................................................... 14 Changes to Ordering Guide .......................................................... 14 10/02--Data Sheet Changed from Rev. D to Rev. E Edits to 8-Lead Epoxy DIP (P-Suffix) Pin......................................1 Edits to Ordering Guide ...................................................................3 Edits to Outline Dimensions......................................................... 11 9/02--Data Sheet Changed from Rev. C to Rev. D Edits to 14-Lead SOIC (S-Suffix) Pin .............................................1 Replaced 8-Lead SOIC (S-Suffix)................................................. 11 4/02--Data Sheet changed from Rev. B to Rev. C Wafer Test Limits Deleted ................................................................2 Edits to Absolute Maximum Ratings ..............................................3 Dice Characteristics Deleted............................................................3 Edits to Ordering Guide ...................................................................3 Edits to Figure 1.................................................................................7 Edits to Figure 3.................................................................................8 20-Position Chip Carrier (RC Suffix) Deleted ........................... 11
Rev. F | Page 2 of 16
OP282/OP482 SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
At VS = 15.0 V, TA = 25C, unless otherwise noted; applies to both A and G grade. Table 1.
Parameter INPUT CHARACTERISTICS Offset Voltage Symbol VOS VOS Input Bias Current Input Offset Current Input Voltage Range Common-Mode Rejection Ratio Large Signal Voltage Gain Offset Voltage Drift Bias Current Drift OUTPUT CHARACTERISTICS Output Voltage High Output Voltage Low Short-Circuit Limit Open-Loop Output Impedance POWER SUPPLY Power Supply Rejection Ratio Supply Current/Amplifier Supply Voltage Range DYNAMIC PERFORMANCE Slew Rate Full-Power Bandwidth Settling Time Gain Bandwidth Product Phase Margin NOISE PERFORMANCE Voltage Noise Voltage Noise Density Current Noise Density IB IOS Conditions OP282 OP282, -40C TA +85C OP482 OP482, -40C TA +85C VCM = 0 V VCM = 0 V1 VCM = 0 V VCM = 0 V1 -11 V VCM +15 V, -40C TA +85C RL = 10 k RL = 10 k, -40C TA +85C -11 70 20 15 Min Typ 0.2 0.2 3 1 Max 3 4.5 4 6 100 500 50 250 +15 Unit mV mV mV mV pA pA pA pA V dB V/mV V/mV V/C pA/C V V mA mA V/V A V V/s kHz s MHz Degrees V p-p nV/Hz pA/Hz
CMRR AVO VOS/T IB/T VOH VOL ISC ZOUT PSRR ISY VS SR BWP tS GBP OO en p-p en in
90
10 8 RL = 10 k RL = 10 k Source Sink f = 1 MHz VS = 4.5 V to 18 V, -40C TA +85C VO = 0 V, -40C TA 85C 4.5 RL = 10 k 1% distortion To 0.01% 7 9 125 1.6 4 55 1.3 36 0.01 +13.5 3 +13.9 -13.9 10 -12 200 25 210
-13.5 -8
316 250 18
0.1 Hz to 10 Hz f = 1 kHz
1
The input bias and offset currents are characterized at TA = TJ = 85C. Bias and offset currents are guaranteed but not tested at -40C.
Rev. F | Page 3 of 16
OP282/OP482 ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameters Supply Voltage Input Voltage Differential Input Voltage1 Output Short-Circuit Duration Storage Temperature Range P-Suffix (N), S-Suffix (R), RM Packages Operating Temperature Range OP282G, OP282A, OP482G Junction Temperature Range P-Suffix (N), S-Suffix (R), RM Packages Lead Temperature Range (Soldering 60 sec) Ratings 18 V 18 V 36 V Indefinite -65C to +150C -40C to +85C -65C to +150C 300C
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Table 3.
Package Type 8-Lead MSOP [RM] 8-Lead SOIC (S-Suffix) [R] 14-Lead PDIP (P-Suffix) [N] 14-Lead SOIC (S-Suffix) [R] JA1 206 157 83 104 JC 44 56 39 36 Unit C/W C/W C/W C/W
1
For supply voltages less than 18 V, the absolute maximum input voltage is equal to the supply voltage.
1
JA is specified for the worst-case conditions; i.e., JA is specified for device in socket for CERDIP, PDIP; JA is specified for device soldered in circuit board for SOIC or MSOP package.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
Rev. F | Page 4 of 16
OP282/OP482 TYPICAL PERFORMANCE CHARACTERISTICS
80 VS = 15V TA = 25C 60 135 180 70 60 50 VS = 15V TA = 25C
CLOSED-LOOP GAIN (dB)
OPEN-LOOP GAIN (dB)
40
90
40 30
AVCL = 100
PHASE (Degree)
AVCL = 10
20
45
20 10
AVCL = 1
0
0
0 -10 -20
00301-008
-20
-45
00301-005
-40 1k
10k
100k FREQUENCY (Hz)
1M
-90 10M
-30 1k
10k
100k FREQUENCY (Hz)
1M
10M
Figure 5. OP282 Open-Loop Gain and Phase vs. Frequency
45 40 35 VS = 15V RL = 10k
Figure 8. OP282 Closed-Loop Gain vs. Frequency
30 VS = 15V RL = 10k CL = 50pF -SR
25
OPEN-LOOP GAIN (V/mV)
25 20 15 10
SLEW RATE (V/s)
30
20
15
10 +SR 5
00301-006
0 -75
-50
-25
0
25
50
75
100
125
0 -75
-50
-25
0
25
50
75
100
125
TEMPERATURE (C)
TEMPERATURE (C)
Figure 6. OP282 Open-Loop Gain vs. Temperature
80 VS = 15V RL = 2k 70 V = 100mV p-p IN AVCL = 1 TA = 25C 60
Figure 9. OP282 Slew Rate vs. Temperature
1000
VS = 15V VCM = 0V
OVERSHOOT (%)
+OS 50 40 30 20
00301-007
-OS
INPUT BIAS CURRENT (pA)
100
10
1
00301-010
10 0
0
100
200
300
400
500
0.1 -75
-50
-25
0
25
50
75
100
125
LOAD CAPACITANCE (pF)
TEMPERATURE (C)
Figure 7. OP282 Small Signal Overshoot vs. Load Capacitance
Figure 10. OP282 Input Bias Current vs. Temperature
Rev. F | Page 5 of 16
00301-009
5
OP282/OP482
1000 VS = 15V TA = 25C
VOLTAGE NOISE DENSITY (nV/ Hz)
20 15
TA = 25C RL = 10k VOH
OUTPUT VOLTAGE SWING (V)
10 5 0 -5 -10 VOL
00301-014
100
10
00301-011
-15 -20
1 10
100 1k FREQUENCY (Hz)
10k
0
5
10 SUPPLY VOLTAGE (V)
15
20
Figure 11. OP282 Voltage Noise Density vs. Frequency
1000 VS = 15V TA = 25C
Figure 14. OP282 Output Voltage Swing vs. Supply Voltage
1000
VS = 15V TA = 25C
INPUT BIAS CURRENT (pA)
100
100
OUTPUT IMPEDANCE ()
AVCL = 100 10 AVCL = 10 1 AVCL = 1
00301-015
10
1
00301-012
0.1 -15
-10
-5
0
5
10
15
0.1 100
1k
COMMON-MODE VOLTAGE (V)
10k FREQUENCY (Hz)
100k
1M
Figure 12. OP282 Input Bias Current vs. Common-Mode Voltage
480 TA = 25C
Figure 15. OP282 Closed-Loop Output Impedance vs. Frequency
480
475
475
SUPPLY CURRENT (A)
470
SUPPLY CURRENT (A)
00301-013
470
465
465
460
460
455
455
00301-016
450
0
5
10 SUPPLY VOLTAGE (V)
15
20
450 -50
-25
0
25
50
75
100
125
TEMPERATURE (C)
Figure 13. OP282 Supply Current vs. Supply Voltage
Figure 16. OP282 Supply Current vs. Temperature
Rev. F | Page 6 of 16
OP282/OP482
16 14 VS = 15V TA = 25C
MAXIMUM OUTPUT SWING (V p-p)
30 VS = 15V TA = 25C RL = 10k AVCL = 1
ABSOLUTE OUTPUT VOLTAGE (V)
VOL 12 10 VOH 8 6 4
00301-017
25
20
15
10
5
00301-020
2 0 100
1k LOAD RESISTANCE ()
10k
0 100
1k
10k FREQUENCY (Hz)
100k
1M
Figure 17. OP282 Absolute Output Voltage vs. Load Resistance
VS = 15V 120 TA = 25C
100 80 140
Figure 20. OP282 Maximum Output Swing vs. Frequency
140 120 100 VS = 15V TA = 25C
+PSRR
80
CMRR (dB)
PSRR (dB)
60 40 20 0 -20
00301-018
60 40 20 0 -20 -40 -60 100
00301-021
-PSRR
-40 -60 100
1k
100k 10k FREQUENCY (Hz)
1M
1k
10k 100k FREQUENCY (Hz)
1M
Figure 18. OP282 PSRR vs. Frequency
14 VS = 15V 12
Figure 21. OP282 CMRR vs. Frequency
200
SHORT-CIRCUIT CURRENT (mA)
160
10 8 SOURCE 6 4 SINK
VS = 15V TA = 25C 300 x OP282 (600 OP AMPS)
120
UNITS
80 40
00301-019
0 -50
-25
0
25
50
75
100
125
0 -2000
-1200
-400
0
400
1200
2000
TEMPERATURE (C)
VOS (V)
Figure 19. OP282 Short-Circuit Current vs. Temperature
Figure 22. OP282 VOS Distribution SOIC Package
Rev. F | Page 7 of 16
00301-022
2
OP282/OP482
400 360 320 280
50 70
VS = 15V 300 x OP282 (600 OP AMPS)
60
VS = 15V RL = 2k VIN = 100mV p-p
AVCL = 1 NEGATIVE EDGE
OVERSHOOT (%)
240
UNITS
40 30 20 10 0 0 100
AVCL = 1 POSITIVE EDGE
200 160 120 80 40 0 0 4 8 12 16 20 24 28 32 36
00301-023
TCVOS (V/C)
300 200 LOAD CAPACITANCE (pF)
400
500
Figure 23. OP282 TCVOS Distribution SOIC Package
80 0
Figure 26. OP482 Small Signal Overshoot vs. Load Capacitance
VS = 15V TA = 25C
60
60 50
VS = 15V TA = 25C AVCL = 100
45
CLOSED-LOOP GAIN (dB)
40 30 AVCL = 10 20 10 AVCL = 1 0
00301-027
OPEN-LOOP GAIN (dB)
40
90
20
135
0
180
00301-024
PHASE (Degrees)
-10 -20 1k 10k 100k 1M 10M FREQUENCY (Hz)
1k
10k
100k 1M FREQUENCY (Hz)
10M
100M
100M
Figure 24. OP482 Open-Loop Gain, Phase vs. Frequency
Figure 27. OP482 Closed-Loop Gain vs. Frequency
35 30
25
VS = 15V RL = 10k
20
-SR
OPEN-LOOP GAIN (V/mV)
25
SLEW RATE (V/s)
VS = 15V RL = 10k CL = 50pF 15
20 15 10 5
10
+SR
5
00301-025
0 -75
-50
-25
0
25
50
75
100
125
0 -75
-50
-25
0
25
50
75
100
125
TEMPERATURE (C)
TEMPERATURE (C)
Figure 25. OP482 Open-Loop Gain (V/mV)
Figure 28. OP482 Slew Rate vs. Temperature
Rev. F | Page 8 of 16
00301-028
00301-026
OP282/OP482
1000 VS = 15V VCM = 0V
1000 VS = 15V TA = 25C
INPUT BIAS CURRENT (pA)
INPUT BIAS CURRENT (pA)
00301-029
100
100
10
10
1.0
1
00301-032
0.1 0 -50 -25 0 25 50 75 100 TEMPERATURE (C)
125
0.1 -15
-10
-5
0
5
10
15
COMMON-MODE VOLTAGE (V)
Figure 29. OP482 Input Bias Current vs. Temperature
60
Figure 32. OP482 Input Bias Current vs. Common-Mode Voltage
5.0
VS = 15V RL = 10k
1.15 TA = 25C
GAIN BANDWIDTH PRODUCT (MHz)
RELATIVE SUPPLY CURRENT (ISY)
PHASE MARGIN (Degrees)
1.10
55 GBW
4.5
1.05
50
4.0
1.00
0.95
45
3.5
0.90
00301-033
-50
-25
0 25 50 TEMPERATURE (C)
75
100
00301-030
40 -75
3.0 125
0.85 0 5 10 SUPPLY VOLTAGE (V) 15 20
Figure 30. OP482 Phase Margin and Gain Bandwidth Product vs. Temperature
80
VOLTAGE NOISE DENSITY (nV/ Hz)
Figure 33. OP482 Relative Supply Current vs. Supply Voltage
20 15
OUTPUT VOLTAGE SWING (V)
70 60 50 40 30 20
VS = 15V TA = 25C
RL = 10k TA = 25C
10 5 0 -5 -10
00301-034
0 10
00301-031
10
-15 -20
100 FREQUENCY (Hz)
1k
10k
0
5
10 SUPPLY VOLTAGE (V)
15
20
Figure 31. OP482 Voltage Noise Density vs. Frequency
Figure 34. OP482 Output Voltage Swing vs. Supply Voltage
Rev. F | Page 9 of 16
OP282/OP482
600
VS = 15V TA = 25C
100 +PSRR 80 VS = 15V V = 100mV TA = 25C
500
IMPEDANCE ()
400
PSRR (dB)
60
-PSRR
300
40
200
AVCL = 100 AVCL = 10
00301-035
20
100
0 100
1k
10k FREQUENCY (Hz)
100k
1M
20 100
1k
10k FREQUENCY (Hz)
100k
1M
Figure 35. OP482 Closed-Loop Output Impedance vs. Frequency
Figure 38. OP482 Power Supply Rejection Ratio (PSRR) vs. Frequency
1.20 1.15 1.10 1.05 1.00 0.95 0.90
VS = 15V
20
VS = 15V SINK
RELATIVE SUPPLY CURRENT (ISY)
SHORT-CIRCUIT CURRENT (mA)
15
10
SOURCE
5
00301-039
00301-036
0.85 0.80 -75
0 -75 -50 -25 0 25 50 75 100 125 TEMPERATURE (C)
-50
-25
0
25
50
75
100
125
TEMPERATURE (C)
Figure 36. OP482 Relative Supply Current vs. Temperature
16 14
ABSOLUTE OUTPUT VOLTAGE (V)
Figure 39. OP482 Short-Circuit Current vs. Temperature
30
VS = 15V TA = 25C AVCL = 1 RL = 10k
VS = 15V TA = 25C
25
12 10 8 6 4
00301-037
POSITIVE SWING
MAXIMUM OUTPUT SWING (V)
20
NEGATIVE SWING
15
10
0 100
0
1k LOAD RESISTANCE ()
10k
1K
10K 100K FREQUENCY (Hz)
1M
Figure 37. OP482 Maximum Output Voltage vs. Load Resistance
Figure 40. OP482 Maximum Output Swing vs. Frequency
Rev. F | Page 10 of 16
00301-040
2
5
00301-038
AVCL = 1
0
OP282/OP482
100
320 280
80
240
60
CMRR (dB)
200
UNITS
00301-041
40
160 120
20
80
0
00301-043
-20 100
VS = 15V TA = 25C VCM = 100mV
1k 10k FREQUENCY (Hz) 100k 1M
40 0 0 4 8 12 16 20 24 28 32 TCVOS (V/C)
Figure 41. OP482 Common-Mode Rejection Ratio (CMRR) vs. Frequency
700
Figure 43. OP482 TCVOS Distribution P Package
600
VS = 15V TA = 25C 300 x OP482 (1200 OP AMPS)
500
UNITS
400
300
200
0 0 400 -2000 -1600 -1200 -800 -400 VOS (V)
800
1200 1600 2000
Figure 42. OP482 VOS Distribution P Package
00301-045
100
Rev. F | Page 11 of 16
OP282/OP482 APPLICATIONS INFORMATION
The OP282 and OP482 are dual and quad JFET op amps that are optimized for high speed at low power. This combination makes these amplifiers excellent choices for battery-powered or low power applications that require above average performance. Applications benefiting from this performance combination include telecommunications, geophysical exploration, portable medical equipment, and navigational instrumentation.
PHASE INVERSION
Most JFET-input amplifiers invert the phase of the input signal if either input exceeds the input common-mode range. For the OP282/OP482, negative signals in excess of approximately 14 V cause phase inversion. The cause of this effect is saturation of the input stage leading to the forward-biasing of a drain-gate diode. A simple fix for this in noninverting applications is to place a resistor in series with the noninverting input. This limits the amount of current through the forward-biased diode and prevents the shutting down of the output stage. For the OP282/OP482, a value of 200 k has been found to work; however, this adds a significant amount of noise.
15
HIGH-SIDE SIGNAL CONDITIONING
There are many applications that require the sensing of signals near the positive rail. OP282s and OP482s were tested and are guaranteed over a common-mode range (-11 V VCM +15 V) that includes the positive supply. One application where this is commonly used is in the sensing of power supply currents. This enables it to be used in current sensing applications, such as the partial circuit shown in Figure 44. In this circuit, the voltage drop across a low value resistor, such as the 0.1 shown here, is amplified and compared to 7.5 V. The output can then be used for current limiting.
15V 0.1
10
5
VOUT
0
-5
500k 100k 100k 1/2
00301-047
RL
-10
OP282
-15 -15
-10
-5
0 VIN
5
10
15
00301-046
500k
Figure 45. OP282 Phase Reversal
ACTIVE FILTERS
The wide bandwidth and high slew rates of the OP282/OP482 make either an excellent choice for many filter applications. There are many active filter configurations, but the four most popular configurations are Butterworth, Elliptical, Bessel, and Chebyshev. Each type has a response that is optimized for a given characteristic as shown in Table 4.
Figure 44. High-Side Signal Conditioning
Table 4.
Type Butterworth Chebyshev Elliptical Bessel (Thompson) Selectivity Moderate Good Best Poor Overshoot Good Moderate Poor Best Phase Nonlinear Linear Amplitude (Pass Band) Maximum Flat Equal Ripple Equal Ripple Amplitude (Stop Band)
Equal Ripple
Rev. F | Page 12 of 16
OP282/OP482
PROGRAMMABLE STATE-VARIABLE FILTER
The circuit shown in Figure 46 can be used to accurately program the Q, the cutoff frequency fC, and gain of a 2-pole state variable filter. OP482s have been used in this design because of their high bandwidths, low power, and low noise. This circuit takes only three packages to build because of the quad configuration of the op amps and DACs. The DACs shown are used in the voltage mode; therefore, many values are dependent on the accuracy of the DAC only and not on the absolute values of the DAC's resistive ladders. This makes this circuit unusually accurate for a programmable filter. Adjusting DAC 1 changes the signal amplitude across R1; therefore, the DAC attenuation times R1 determines the amount of signal current that charges the integrating capacitor, C1. This cutoff frequency can now be expressed as
fc =
1 D1 2R1C1 256
where D1 is the digital code for the DAC. The gain of this circuit is set by adjusting D3. The gain equation is
Gain = R4 D3 R5 256
DAC 2 is used to set the Q of the circuit. Adjusting this DAC controls the amount of feedback from the band-pass node to the input summing node. Note that the digital value of the DAC is in the numerator; therefore, zero code is not a valid operating point.
Q= R2 256 R3 D2
R7 2k R4 2k VIN 1/4 1/4 R5 2k 1/4 C1 1000pF R1 2k 1/4 C1 1000pF R1 2k 1/4
DAC8408
OP482
OP482
1/4
1/4
DAC8408
OP482
OP482
1/4
1/4
DAC8408
HIGH PASS
OP482
OP482
LOW PASS
R6 2k R3 2k R2 2k 1/4
BAND PASS
1/4
OP482
1/4
DAC8408
00301-048
OP482
Figure 46.
Rev. F | Page 13 of 16
OP282/OP482 OUTLINE DIMENSIONS
5.00 (0.1968) 4.80 (0.1890)
8 5 4
4.00 (0.1574) 3.80 (0.1497) 1
6.20 (0.2440) 5.80 (0.2284)
1.27 (0.0500) BSC 0.25 (0.0098) 0.10 (0.0040)
1.75 (0.0688) 1.35 (0.0532)
0.50 (0.0196) x 45 0.25 (0.0099)
0.51 (0.0201) COPLANARITY SEATING 0.31 (0.0122) 0.10 PLANE
8 0.25 (0.0098) 0 1.27 (0.0500) 0.40 (0.0157) 0.17 (0.0067)
COMPLIANT TO JEDEC STANDARDS MS-012AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
Figure 47. 8-Lead Standard Small Outline Package [SOIC] Narrow-Body S-Suffix (R-8) Dimensions shown in millimeters and (inches)
3.00 BSC
8
5
3.00 BSC
1
4.90 BSC
4
PIN 1 0.65 BSC 1.10 MAX 8 0 0.80 0.60 0.40
0.15 0.00 0.38 0.22 COPLANARITY 0.10
0.23 0.08 SEATING PLANE
COMPLIANT TO JEDEC STANDARDS MO-187AA
Figure 48. 8-Lead Mini Small Outline Package [MSOP] (RM-8) Dimensions shown in millimeters
Rev. F | Page 14 of 16
OP282/OP482
8.75 (0.3445) 8.55 (0.3366)
14 1 8 7
4.00 (0.1575) 3.80 (0.1496)
6.20 (0.2441) 5.80 (0.2283)
0.25 (0.0098) 0.10 (0.0039) COPLANARITY 0.10
1.27 (0.0500) BSC
1.75 (0.0689) 1.35 (0.0531)
0.50 (0.0197) x 45 0.25 (0.0098)
0.51 (0.0201) 0.31 (0.0122)
SEATING PLANE
8 0.25 (0.0098) 0 1.27 (0.0500) 0.40 (0.0157) 0.17 (0.0067)
COMPLIANT TO JEDEC STANDARDS MS-012AB CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
Figure 49. 14-Lead Standard Small Outline Package [SOIC] Narrow-Body S-Suffix (R-14) Dimensions shown in millimeters and (inches)
0.685 (17.40) 0.665 (16.89) 0.645 (16.38)
14 1 8 7
0.295 (7.49) 0.285 (7.24) 0.275 (6.99)
0.100 (2.54) BSC 0.015 (0.38) MIN 0.180 (4.57) MAX 0.150 (3.81) 0.130 (3.30) 0.110 (2.79) SEATING 0.022 (0.56) 0.060 (1.52) PLANE 0.018 (0.46) 0.050 (1.27) 0.014 (0.36) 0.045 (1.14)
0.325 (8.26) 0.310 (7.87) 0.300 (7.62)
0.150 (3.81) 0.135 (3.43) 0.120 (3.05)
0.015 (0.38) 0.010 (0.25) 0.008 (0.20)
COMPLIANT TO JEDEC STANDARDS MO-095-AB CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
Figure 50. 14-Lead Plastic Dual-in-Line Package [PDIP] P-Suffix (N-14) Dimension shown in inches and (millimeters)
Rev. F | Page 15 of 16
OP282/OP482
ORDERING GUIDE
Model OP282ARMZ-R21 OP282ARMZ-REEL1 OP282GS OP282GS-REEL OP282GS-REEL7 OP282GSZ1 OP282GSZ-REEL1 OP282GSZ-REEL71 OP482GP OP482GS OP482GS-REEL OP482GS-REEL7 OP482GSZ1 OP482GSZ-REEL1 OP482GSZ-REEL71 Temperature Range -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C Package Description 8-Lead MSOP 8-Lead MSOP 8-Lead SOIC 8-Lead SOIC 8-Lead SOIC 8-Lead SOIC 8-Lead SOIC 8-Lead SOIC 14-Lead PDIP 14-Lead SOIC 14-Lead SOIC 14-Lead SOIC 14-Lead SOIC 14-Lead SOIC 14-Lead SOIC Package Option RM-8 RM-8 S-Suffix (R-8) S-Suffix (R-8) S-Suffix (R-8) S-Suffix (R-8) S-Suffix (R-8) S-Suffix (R-8) P-Suffix (N-14) S-Suffix (R-14) S-Suffix (R-14) S-Suffix (R-14) S-Suffix (R-14) S-Suffix (R-14) S-Suffix (R-14) Branding A0B A0B
1
Z = Pb-free part.
(c) 2004 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. C00301-0-10/04(F)
Rev. F | Page 16 of 16
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